Department of Information Technology
Indian Institute of Engineering Science and Technology, Shibpur


  • Special Manpower Development Project related to VLSI design & related software (150 lac, DIT, MCIT)

  • VLSI Design Project (164 lac, DIT, WB)

  • Cloud Computing Research Project (CTS, India) (13lac)

  • Modernization of VLSI Laboratory (AICTE) (17.80Lac)

  • High Power and Spectral Efficiency Multi-User System for Broadband Wireless Communication

  • 3D TV - 3D View from All Directions without glasses Generation, Decomposition, and Analysis of the Isothetic Polygons in Digital Geometric Paradigm

  • Synthesis of Reversible Circuits using Probabilistic Methods and Functional Transformations

  • Efficient Synthesis of Optimized Testable Hardware for Polynomials over GF(2m) (20,000 Pound)

  • SMDP-II Project (Project-1.70 crore)

  • Efficient Test infrastructure Design for 3D Multi-core Integrated Circuits

  • VLSI Design Project (1.64 crore)

  • Fault Tolerant Routing in Wireless Sensor Networks

  • Web Hosting of Rabindra Rachanbali in Unicode Format

  • Web Site Development of Sarat Rachanbali in Unicode Format

  • High Power and Spectral Efficiency Multiuser System for Broadband Wireless Communication.

  • Development of FPGA Band Embedded System for Network on Chip (NOC) Application

  • Career Award for Young Teachers (CAYT), AICTE 10.5 Lac

  • Development of Automata Model for Distributed Systems 4.71 Lac

  • Development Of FPGA Based Embedded System for Network On Chip (NOC) Application

  • Design of a low power, low skew, low jitter, low frequency (256 khz) clock generator

  • Development of obstacle aware routing tool for 3D integrated circuits

  • Efficient Test Infrastructure Design for 3D Multicore Integrated Circuits

  • Design and Analysis of Algorithms for Design Automation of Digital Micro fluidic Biochip

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